Reference Disk for Type 3-
Diagnostics for Type 3 (Common to all complexes)

Memory
Min/Max on system board: 8/64MB (parity or ECC same limits)
PS/2 72-pin SIMM, (ECC or Parity) Interleaved SIMMs ONLY.
   The PS/2 Enhanced 486/50 Processor Upgrade Option supports a maximum of 64MB of ECC or parity memory, addressable by DMA.  The PS/2 Enhanced 486/50 Processor Upgrade Option supports 1MB and 2MB 85ns memory, 2MB, 4MB and 8MB 80ns memory and 4MB and 8MB ECC 70ns memory.  The memory SIMMs must be installed in matched pairs (speed, size and type).

ROM: 128kb 
Cache: 8kb L1, 256kb L2 cache
* 40 MB per second streaming data transfer support.
* Error Checking and Correcting (ECC) memory controller
* 256KB Level 2 memory cache (write-through) is standard.
* 20 MHz DMA; 32 bit DMA directly addresses all memory;  DMA supports Subsystem Control Block.
* Faster bus arbitration (than Base 1) for busmaster performance.
* Enhanced Dual Path Memory
* Subsystem Control Block enabled
* Vital Product Data support.
* Synchronous Channel Check support
* Data bus parity support
* A logging facility is provided (for ECC or system errors).

1GB">>1GB Drives as IML
   The M complex supports >1GB drives as the IML source. No complex BIOS upgrade is needed (or available). However, the SCSI controller needs the enhanced SCSI BIOS of 92F2244 / 92F2245 to IML properly.

False ARTIC diag error
   SYMPTOM: When running diagnostics on the ARTIC Portmaster Adapter/A in an 8590 or 8595 with the 486/50MHZ processor card installed, a false 14220, E0DE error may occur.
   PROBLEM ISOLATION AIDS: Check the date of the Portmaster Adapter/A diagnostic file (DEV141.DGS) on the system reference diskette. Files dated 1-31-90 or earlier will exhibit the symptom.
   FIX: Download updated Portmaster Adapter/A option diskette

Daughtercard

U13, U18 L2 Cache Controller
U4, U5, U7-U12 Toshiba TC55B329J-12

Why DX50 is on Daughtercard
   The DX50 *always* sits on the second card stacked on the base-card with the  MCA-connector. This is caused by the odd Intel cache chipset, which has a limitation on the distance it can be installed away from the CPU ... And while there was not enough room to stuff everything on one single printboard the cpu and cache sit in the "upper floor".

Versions Incompatible with Network Streamers
   The downlevel processor card is identified by the lack of a module in position SP1. This card may cause data loss or undetected change in the:
   Lanstreamer MC 16 PN 58G8999
   Lanstreamer MC 32 PN 92F8941
   Etherstreamer MC 32 PN 59G9081

  I have seen one card with the older BIOS 41G9251 ('92) that has NO rework. The three DX50 I have with the new BIOS 52G9619 ('93) all have the rework. Why? Haven't a clue.

Daughtercard Rework on Right

Daughtercard Rework on Left

41G9251 BIOS. Mitsubishi variant of the 27C201, (256K x 8-bit.)

87X0079 What is this? It's on all later complexes.

J1  Earlier versions had a double pin-row connector at that place ... intended for the (or: one) precessor of the Systems Management Adapter used on "high availability network servers".

Diagnostic LEDs
   The 50-MHz Type 3 processor board in a 90/95 (submodel code 28 and 29), has two LEDs; one in position CR1, and one in CR2. During POST, CR1 should come on momentarily and CR2 should stay off. If the LEDs work any other way, suspect that the processor board is defective. 
   Use the LEDs to help differentiate between a processor board or a system board failure. If you are instructed to replace one of the boards, and the problem still exists, replace the other board (also reinstall the first board). (Ed. Reports coming in make me wonder about any of this. If the board passes diagnostics, and works normally, do you really care about the LEDs?)

Jim Shorney
    Pay no attention to the manual.  Set the multiplier to x3, the cache jumper (if present) to write-through, and plug it in.  It will probably work fine.