U6 Variants
    Some Type-2 (92F0079) suffer from an "incompetent DMA-chip", which is P/N 92F1428 at position U6/GA-M on the card. Working Type-2s 92F0079 have a DMA-chip P/N 10G7808 at U6/GA-M. If U6/GA-M is 10G7808 a Turbochip should work fine.
   The earlier Type-2 use the 92F1428 -  which ends the experiment in odd results (permanent I9990044, 605 FDD errors, permanent 165 errors and inability to read from FDD).

P/N 92F1428 (Bad)
P/N 10G7808 (Good)
P/N 10G4714 (Possibly Good)

WARNING! A CD in the single 5.25" bay may prevent a TC133/Evergreen /Overdrive equipped complex from being seated on the slot. Worse, if you have the drive out during install, then ram it home after locking the complex in, you MAY shear off the heatsink/fan at best. Or you may cause other damage.

Late Breaking News  31 Mar 01
   Well, David Beem had W-A-A-Y too much time to kill, so he sent me an -xLx with U6 10G4714. Expirements will eventually happen. I'd just rather ignore the new IC entirely... Oh well.

Peter Wendt puts the German Beer down, wipes off the foam, and says:
  OK, so at least you're not in danger toasting the CPU. (Tastes pretty bad anyway - toasted or raw)

FWIW: I ran the Kingston Turbochip-133 at 100MHz on various 25MHz Type-2 platforms, but all of them had the "competent" DMA chip 10G7808 at U6/GA-M *and* had the latest platform BIOS 41G9361.

   The presence of a chip at position U23 (on the solder side of the board) seems also be a critical point: if it is there the board is made in 1992, earlier
1991-manufactured board lack this chip - and failed to work with anything
faster than a DX2-25/50. (Or a DX2-33/66, which will run as a 25/50 there only anyway)

DX4s or Evergreen, Kingston and such like based on a quad-clocked AMD 5x86 failed with no exception on the earlier ones.

There should be a silk-screened "Date of MFG" number somewhere on the platform, like e.g. 2092A0700 - which means 20th week 1992 (first 4 digits). If yours is a 1991 platform or early 1992 without the U23 chip - forget about it. On these boards I had a failure-rate of 100% (about 20 out of 20 ...).

>Interestingly, putting back the 486 DX-2 50 doesn't work now either. It still gets stuck on the 96-8N1, even after removing the battery for a couple
of minutes!

IBM wrote in the HMM "Remove the battery, then wait 5 minutes ..." (HMM,
September 1993, P/N 71G9316, page 300, "96 8N1 Error Message") but empirical research showed that this doesn't work fairly often.

Shortening the battery connectors (with the battery removed of course) *and*
toggling the startup password jumper seems to be the only fast cure. There
seems to be a board logic, that ANDs the two conditions after a power-on and
deletes the entire setup from the CMOS.

At least during the "hot phase" when the Mod. 90s and 95s can be found in
larger amounts at the customers this procedure was the only one that worked in
a sufficiently fast way. And I had quite a lot 95s under service ... ;-) (Some are mine now)

  The upgrade provides the following additional capabilities:
  1. Adapter ROM memory  more efficiently utilized to minimize  adapter configuration conflicts.
  2. BIOS support for fixed disks up to 3.94 gigabytes per device.
  3. Supports "Search IML" from any PUN (Physical Unit Number) or  SCSI ID.  The system partition is no longer restricted to only SCSI ID=6.  Each fixed disk ID will be searched for a valid system partition.
  4. Allows redundant system partitions (IML).
  5. Sharing of SCSI devices.  An external SCSI device, such as the 3511, may be shared between two system units.

  The following models are affected:
  2. Type 2 processor systems, Model 0HX.  ( "X" may  be any character.)
    PROCESSOR  FRU P/N   MODEL    EPROM P/N     LOC.
     25MHZ SX   92F0079   0HX        N/A        U16
  It was called the "8590/95 Dual Booting Capability EPROM Package"  "8590/95 Dual Booting Capability EPROM Package"

    Type 2         PART NUMBER 61G2835

  NOTE:  Use the latest refdisk and diags. See above...

Y1 Functions
   Swapping a 66.667Mhz osc in for the 50MHz one will result in a 00010200 code in the upper left hand of the screen and a system hang.
   The Y1 Oscillator drives both the data bus and the DMA controller. 0001 02XX ROM checksum or timer error.

ID H and L Complexes
   Both H and L have no L2 cache socket OR solder pads for one.

   H models (92F0079) came with a 486SX-25 in U8 and have a second socket (U9) for a 487 copro or a 486DX2-50 ODP upgrade chip. They will accept a Turbochip if the DMA controller is the good one.
   L models  (92F0161)came with a 486DX2-50 in U8 and have only solder pads at the U9 location. They will take a ODPR  or (with the good DMA controller) a Turbochip.

Reference Disk for Type 2
Diagnostics for Type 2

Memory
Min/Max on system board: 8/64MB 
RAM: DRAM (PS/2 72-pin SIMM) 70ns parity checked (8 sockets) 
       The PS/2 486DX2-50 Processor Upgrade Option supports a maximum of 64MB of parity memory, 16MB of which are addressable by DMA.  The PS/2 486DX2-50 Processor Upgrade Option does not support 85ns memory SIMMs.

ROM: 128kb 
Cache: 8kb L1, 0kb L2 (no socket for cache)
Features
* No Level 2 cache socket on complex.
* H models socketed for a 487 copro or a 486DX2-50 MHz upgrade chip.
* High speed 25 MHz DMA - now synchronous with 486; 24 bit DMA.
* Faster bus arbitration (than Base 1) for better busmaster performance.
* Memory controller supports both interleaved (higher performance –pairs of SIMMs) and non-interleaved memory (allows single SIMMs). 
* 20 MB per second data transfer support (for MCA bus).

ODP vs. ODPR 
  The 169 pin is the ODP-version - substitutes a 487SX with the 486SX still in place. Important on  boards with soldered CPU or a second socket.
   The 168 pin is the ODPR-version, where the -R- stands for "Replace" ... it replaces the 486SX / 486DX respectively and does not need the "SX-disable" pin therefore. 

ODP in Original Socket
> > Dr. Jim, can the 169th pin be bent/removed and the CPU used?

> Yep.  The socket I just put into my P75 has an empty hole to allow that extra pin to pass.  I've drilled similar holes in older 486 sockets myself.  Carefully.  BTW, I've been informed that it is NOT the SX disable pin, just a key pin.  The SX disable is elsewhere.

 Jose Duran
   You are right, this pin is only a key pin without any signal. The sx 
disable pin is B14 (as far as I remember). I have installed an AMD DX5 
on an upgrade socket with a voltage adapter. Since my cpu didn't have
any sx disable signal on it. I had to solder a wire from pin B14 to ground, thus putting the sx into tristate. It works perfectly.

But now I still have some questions: (Ed. PS/1 Stuff, may be relevant)
   Does 256kB Cache have something to do with my computer crashing under windows when I have more than 16MB of RAM in it?
   My motherboard(PS/1 2133 540) has a bus speed of 25MHz, which oscilator do I need for 33MHz? is it a 33MHz or 66MHz? will the ISA Bus run overclocked then?

ECA100 - 8590/95, 486-SX-25MHZ DISKETTE DATA LOSS
   This problem may allow bad data to be read from or written to a device WITHOUT any error indications or other evidence of system failure. This affects any device attached to the floppy controller that is "seen" as a floppy drive, such as some tape backup devices.

AFFECTED SYSTEMS:
   All systems using the 486SX/25MHZ complex FRU P/N92F0079. 

 NOTES:
 The following adapters are no longer supported due to this problem:
   5.25 INCH DISKETTE ADAPTER/A (6451007), 4869-001 360KB External Floppy and 4869-002 1.2MB External Floppy
   These adapters use a seperate device driver (not BIOS), and DMA verify. Updating the system partition will NOT cure the problem.